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| general description the max16031/MAX16032 eeprom-configurable sys- tem monitors feature an integrated 10-bit analog-to- digital converter (adc) designed to monitor voltages, temperatures, and current in complex systems. these eeprom-configurable devices allow enormous flexibility in selecting operating ranges, upper and lower limits, fault output configuration, and operating modes with the capability of storing these values within the device. the max16031 monitors up to eight voltages, three temperatures (one internal/two external remote temper- ature diodes), and a single current. the MAX16032 monitors up to six voltages and two temperatures (one internal/one remote temperature diode). each of these monitored parameters is muxed into the adc and writ- ten to its respective register that can be read back through the smbus and jtag interface. measured values are compared to the user-config- urable upper and lower limits. for voltage measure- ments, there are two undervoltage and two overvoltage limits. for current and temperature, there are two sets of upper limits. whenever the measured value is out- side its limits, an alert signal is generated to notify the processor. independent outputs are available for over- current, overtemperature, and undervoltage/overvolt- age that are configured to assert on assigned channels. there are also undedicated fault outputs that are configured to offer a secondary limit for tempera- ture, current, or voltage fault or provide a separate overvoltage output. during a major fault event, such as a system shutdown, the max16031/MAX16032 automatically copy the inter- nal adc registers into the nonvolatile eeprom registers that then are read back for diagnostic purposes. the max16031/MAX16032 offer additional gpios that are used for voltage sequencing, additional fault out- puts, a manual reset input, or read/write logic levels. a separate current-sense amplifier with an independent output allows for fast shutoff during overcurrent condi- tions. the max16031/MAX16032 are available in a 7mm x 7mm tqfn package and are fully specified from -40? to +85?. applications servers workstations storage systems networking telecom features supply voltage operating range of 2.85v to 14v monitors up to eight voltages (single-ended or pseudo-differential) with 1% accuracy eeprom-configurable limits two undervoltage and two overvoltage two overtemperature two overcurrent high-side current-sense amplifier with overcurrent output (max16031 only) monitors up to three temperatures (1 internal/2 remote) nonvolatile fault memory stores fault conditions for later retrieval two additional configurable fault outputs two configurable gpios smbus/i 2 c-compatible interface with alert output and bus timeout function jtag interface 7mm x 7mm, 48-pin tqfn package max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ maxim integrated products 1 48 in1 47 n.c. 46 dxp1 45 dxn1 44 n.c. (dxp2) 43 n.c. (dxn2) 42 n.c. (cs+) 41 n.c. (cs-) 40 n.c. 39 n.c. 38 v cc 37 13 14 15 12 11 10 9 8 7 6 5 4 3 2 1 + 25 26 27 28 29 30 31 32 33 34 35 36 16 17 18 19 20 21 22 23 24 v cc gnd gpio1 gpio2 rbp sda scl a0 a1 alert overt n.c. (overc) fault2 abp gnd dbp tdo n.c. n.c. n.c. tdi tck tms reset fault1 ( ) max16031 only in2 in3 in4 n.c. n.c. n.c. n.c. gnd in5 in6 n.c. (in7) n.c. (in8) max16031 MAX16032 tqfn (7mm x 7mm) pin configuration 19-0870; rev 1; 10/07 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information part temp range pin- package pkg code max16031 etm+ -40? to +85? 48 tqfn-ep* t4877-6 MAX16032 etm+ -40? to +85? 48 tqfn-ep* t4877-6 smbus is a trademark of intel corp. + denotes a lead-free package. * ep = exposed paddle.
max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 2 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ typical application circuit max16031 alert 1 f 3.3v aux 12v bus 1 f scl sda gpio1 reset fault1 fault2 overt overc gpio2 dxn2 dxp2 abp cs+ dxn1 dxp1 v cc int scl c sda system reset to fan control warning indicators manual reset switch system jtag header to other jtag devices reset 1 f dbp 2.2 f rbp gnd a0 a1 tdi tdo tck tms tms tck tdi tdo cs- in1 1.8v dc-dc en 2.5v dc-dc en 3.3v dc-dc en 5v dc-dc 0.9v linear 1.2v dc-dc 1.5v dc-dc en in2 in3 in4 in5 in6 in7 in8 5v 1.5v 3.3v 1.2v 2.5v 0.9v 1.8v selector guide voltage monitors temperature sensors part single ended differential int ext current- sense amps fault outputs gpios max16031etm+ 8 4 1 2 1 4 2 MAX16032etm+ 6 3 1 1 4 2 max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 3 absolute maximum ratings electrical characteristics (v cc = 2.9v to 14v, t a = -40? to +85?, unless otherwise specified. typical values are at v cc = 3.3v, t a = +25?.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd ............................................................-0.3v to +15v in_, fault_, scl, sda, overt to gnd.................-0.3v to +6v a0, a1, tck, tms, tdi to gnd ................................-0.3v to +6v overc , reset , gpio_, alert to gnd..................-0.3v to +6v rbp, abp, dbp to gnd ...-0.3v to lower of (6v and v cc + 0.3v) tdo, dxp1, dxp2 to gnd..........................-0.3v to v dbp + 0.3v cs+, cs- to gnd ...................................................-0.3v to +30v (cs+ - cs-) ............................................................................?v dxn1, dxn2 to gnd.............................................-0.3v to +0.8v sda, alert current ...........................................-1ma to +50ma dxn1, dxn2 current ............................................................1ma input/output current (all except dxn1, dxn2, sda, and alert ) ..................20ma continuous power dissipation (t a = +70?) 48-pin, 7mm x 7mm tqfn (derate 27.8mw/? above +70?) ........................2222.2mw operating temperature range ...........................-40? to +85? junction temperature .....................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+250? parameter symbol conditions min typ max units operating voltage range v cc 2.90 14.00 v undervoltage lockout v uvlo minimum voltage at v cc to access the digital interfaces 2.8 v undervoltage lockout hysteresis v uvlohys 100 mv supply current i cc static (eeprom not accessed) 3 5 ma adc dc accuracy resolution 10 bits total unadjusted error t a = -40? to +85? 0.9 % fsr integral nonlinearity 1 lsb differential nonlinearity 1 lsb adc total monitoring cycle time t cycle eight supply inputs, three temperatures, and current sense 80 100 ? register map bit set to 00 (lsb = 5.46mv) 5.6 register map bit set to 01 (lsb = 2.73mv) 2.8 adc in_ voltage ranges register map bit set to 10 (lsb = 1.36mv) 1.4 v reference voltage v rbp 1.306 1.4 1.414 v in_ analog input absolute input voltage range (referenced to gnd) 0 5.6 v input impedance 30 50 80 k ? max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 4 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ parameter symbol conditions min typ max units r5ch[5] = 0 0.78 input hysteresis percent of programmed threshold r5ch[5] = 1 1.17 % reset output r20h[5:3] = 000; from mr going high 22.5 25 27.5 ? r20h[5:3]= 001 2.25 2.5 2.75 r20h[5:3]= 010 9 10 11 r20h[5:3]= 011 36 40 44 r20h[5:3]= 100 144 160 176 r20h[5:3]= 101 576 640 704 r20h[5:3]= 110 1152 1280 1408 reset timeout period t rp r20h[5:3]= 111 2304 2560 2816 ms temperature measurements internal sensor measurement error (note 2) ? ? external remote diode temperature measurement error (note 2) ? ? temperature measurement resolution 0.5 ? temperature measurement noise internal sensor 0.1 ? external diode drive high 84 ? external diode drive low 6 a diode drive current ratio 14 dxn_ impedance to gnd 1.8 k ? power-supply rejection psr internal sensor, dc condition 0.1 ?/v current sense cs+ input voltage range v cs+ 328v i cs+ v cs+ = v cs- 14 25 input bias current i cs- v cs- = v cs+ 38 ? a = 48 21.5 25 28.5 a = 24 45 50 55 a = 12 92 100 108 primary current-sense differential thresholds v csth v cs+ - v cs- a = 6 190 200 210 mv primary current-sense threshold cs hys percent of v csth 0.5 % r5ch[1:0] = 00 50 ? r5ch[1:0] = 01 3.6 4 4.4 r5ch[1:0] = 10 14.4 16 17.6 secondary overcurrent threshold timeout r5ch[1:0] = 11 57.6 64 70.4 ms electrical characteristics (continued) (v cc = 2.9v to 14v, t a = -40? to +85?, unless otherwise specified. typical values are at v cc = 3.3v, t a = +25?.) (note 1) max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 5 parameter symbol conditions min typ max units a = 6 232 a = 12 116 a = 24 58 current-sense analog input range v cs+ - v cs- a = 48 29 mv v sense = 150mv, (a = 6 only) -4 ?.2 +4 v sense = 50mv, (a = 6, 12 only) -10 ?.2 +10 v sense = 25mv ? adc current-sense measurement accuracy v sense = 10mv ?0 % gain accuracy v sense = 20mv to 100mv, v cs+ = 12v, a = 6 -3 +3 % common-mode rejection ratio cmrr cs v cs+ > 4v 80 db power-supply rejection ratio psrr cs 80 db overc output leakage current i overclkg 1 a overc output low voltage v oloverc i out = 3ma 0.4 v overc propagation delay t overc v sense - v csth > 10% x v csth 5 s smbus interface (scl, sda) logic-input low voltage v il input voltage falling 0.8 v logic-input high voltage v ih input voltage rising 2.0 v input leakage current gnd or 5.5v (v cc = 5.5v) v scl , v sda -1 +1 ? output low voltage v ol i sink = 3ma 0.4 v input capacitance c in 5pf alert , fault_, and gpio_ outputs alert , fault_ , and gpio_ output low voltage i sink = 3ma 0.4 v alert , fault_ , and gpio_ leakage current v alert , v fault , v gpio_ = 5.5v or gnd -1 +1 ? gpio_ (input) logic-low voltage gpio_ voltage falling 0.8 v logic-high voltage gpio_ voltage rising 2.0 v smbus address (a0 and a1) address logic-low 0.4 v address logic-high 1.4 v high-impedance leakage current maximum current to achieve high- impedance logic level -1 +1 ? input leakage current 0 to 3v, v cc = 3v -12 +12 ? electrical characteristics (continued) (v cc = 2.9v to 14v, t a = -40? to +85?, unless otherwise specified. typical values are at v cc = 3.3v, t a = +25?.) (note 1) max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 6 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ parameter symbol conditions min typ max units smbus timing (see figure 1) serial-clock frequency f scl 400 khz bus free time between stop and start conditions t buf 1.3 ? start condition setup time t su:sta 0.6 ? start condition hold time t hd:sta 0.6 ? stop condition setup time t su:sto 0.6 ? clock low period t low 1.3 ? clock high period t high 0.6 ? data setup time t su:dat 100 ns output fall time t of c bus = 10pf to 400pf 250 ns data hold time t hd:dat from 50% scl falling to sda change 0.3 0.9 ? minimum pulse width ignored 30 ns smbus timeout t timeout scl time low for reset 25 35 ms jtag interface (see figure 2) tdi, tms, tck logic-low input voltage v il input voltage falling 0.4 v tdi, tms, tck logic-high input voltage v ih input voltage rising 2.2 v tdo logic-output low voltage v ol i sink = 4ma 0.4 v tdo logic-output high voltage v oh i source = 1ma 2.2 v tdo leakage current tdo high impedance -10 +10 ? tdi, tms pullup resistors r jpu pullup to v dbp 6.5 10 16 k ? i/o capacitance c i/o 50 pf tck clock period t 1 1000 ns tck high/low time t 2, t 3 (note 3) 60 500 ns tck to tms, tdi setup time t 4 15 ns tck to tms, tdi hold time t 5 35 ns tck to tdo delay t 6 500 ns tck to tdo high-impedance delay t 7 500 ns miscellaneous power-on delay t d-po 4ms single-byte eeprom write cycle delay (note 4) 11 ms electrical characteristics (continued) (v cc = 2.9v to 14v, t a = -40? to +85?, unless otherwise specified. typical values are at v cc = 3.3v, t a = +25?.) (note 1) note 1: limits to -40? are guaranteed by design. note 2: guaranteed by design. note 3: tck stops either high or low. note 4: an additional cycle is required when writing to configuration memory for the first time. max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 7 stop condition repeated start condition start condition t high t low t r t f t su:dat t su:sta t su:sto t hd:sta t buf t hd:sta t hd:dat scl sda start condition figure 1. smbus interface timing diagram tck t 1 t 2 t 3 t 4 t 5 t 6 t 7 tdi, tms tdo tri-state only figure 2. jtag interface timing diagram max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 8 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ v cc supply current vs. v cc supply voltage max16031 toc01 v cc (v) i cc (ma) 12 10 8 6 4 2 0.5 1.0 1.5 2.0 2.5 3.0 0 014 t a = +25 c t a = +85 c t a = -40 c normalized in_ threshold vs. temperature max16031 toc02 temperature ( c) normalized in_ threshold 60 35 10 -15 0.98 0.99 1.00 1.01 1.02 1.03 0.97 -40 85 normalized reset timeout period vs. temperature max16031 toc03 temperature ( c) normalized reset timeout period 60 35 10 -15 0.96 0.97 0.98 0.99 1.00 1.01 1.02 1.03 1.04 1.05 0.95 -40 85 output voltage low vs. sink current max16031 toc04 sink current (ma) output voltage low (mv) 6 5 1 2 3 4 50 100 150 200 250 300 350 400 0 07 adc integral nonlinearity vs. input voltage max16031 toc05 input voltage (digital code) adc inl (lsb) 896 768 512 640 256 384 128 -0.40 -0.30 -0.20 -0.10 0 0.10 0.20 0.30 0.40 0.50 -0.50 0 1024 adc differential nonlinearity vs. input voltage max16031 toc06 input voltage (digital code) adc dnl (lsb) 896 768 640 512 384 256 128 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 -0.20 0 1024 typical operating characteristics (typical values are at v cc = 3.3v, t a = +25?, unless otherwise noted.) noise histogram max16031 toc07 adc output code counts (thousands) 513 512 510 511 509 508 100 200 300 400 500 600 700 800 900 1000 0 507 adc half-scale voltage input reference voltage vs. temperature max16031 toc08 temperature ( c) reference voltage (v) 60 35 10 -15 1.32 1.34 1.36 1.38 1.40 1.42 1.44 1.46 1.48 1.50 1.30 -40 85 max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _______________________________________________________________________________________ 9 internal temperature sensor accuracy vs. temperature max16031 toc09 temperature ( c) temp sensor accuracy ( c) 65 40 15 -10 -2 -1 0 1 2 3 -3 -35 90 temperature error vs. remote diode temperature max16031 toc10 remote diode temperature ( c) temperature error ( c) 90 75 45 60 0 15 30 -15 -4 -3 -2 -1 0 1 2 3 4 5 -5 -30 105 temperature error vs. leakage resistance max16031 toc11 leakage resistance (m ? ) temperature error ( c) 10 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 -55 1 100 path = dxp to gnd path = dxp to v cc (+5v) temperature error vs. dxp-dxn capacitance max16031 toc12 dxp-dxn capacitance (nf) temperature error ( c) 8 7 5 6 2 3 4 1 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 -10 09 current-sense accuracy vs. v sense max16031 toc13 v sense (mv) current-sense accuracy (%) 207 184 161 138 115 92 69 46 23 -2 0 2 4 6 8 -4 0 230 current-sense primary threshold vs. v sense overdrive max16031 toc14 v sense overdrive (mv) current-sense primary threshold ( s) 80 60 40 20 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 0100 typical operating characteristics (continued) (typical values are at v cc = 3.3v, t a = +25?, unless otherwise noted.) max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 10 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ pin description pin max16031 MAX16032 name function 1 1 in2 supply monitor input 2. in2 is internally sampled by the adc. it is configurable for unipolar/ bipolar and single-ended/pseudo-differential. in pseudo-differential mode, in1 and in2 form the + and - of the differential pair. each input must stay within the specified adc in_ voltage range. 2 2 in3 supply monitor input 3. in3 is internally sampled by the adc. it is configurable for unipolar/ bipolar and single-ended/pseudo-differential. in pseudo-differential mode, in3 and in4 form the + and - of the differential pair. each input must stay within the specified adc in_ voltage range. 3 3 in4 supply monitor input 4. in4 is internally sampled by the adc. it is configurable for unipolar/ bipolar and single-ended/pseudo-differential. in pseudo-differential mode, in3 and in4 form the + and - of the differential pair. each input must stay within the specified adc in_ voltage range. 4?, 30, 31, 32, 39, 40, 47 4?, 11, 12, 23, 30, 31, 32, 39, 40?4, 47 n.c. no connection. leave unconnected. do not use. 8, 13, 35 8, 13, 35 gnd ground. connect all gnd pins together. 9 9 in5 supply monitor input 5. in5 is internally sampled by the adc. it is configurable for unipolar/ bipolar and single-ended/pseudo-differential. in pseudo-differential mode, in5 and in6 form the + and - of the differential pair. each input must stay within the specified adc in_ voltage range. 10 10 in6 supply monitor input 6. in6 is internally sampled by the adc. it is configurable for unipolar/ bipolar and single-ended/pseudo-differential. in pseudo-differential mode, in5 and in6 form the + and - of the differential pair. each input must stay within the specified adc in_ voltage range. 11 in7 supply monitor input 7. in7 is internally sampled by the adc. it is configurable for unipolar/ bipolar and single-ended/pseudo-differential. in pseudo-differential mode, in7 and in8 form the + and - of the differential pair. each input must stay within the specified adc in_ voltage range. 12 in8 supply monitor input 8. in8 is internally sampled by the adc. it is configurable for unipolar/ bipolar and single-ended/pseudo-differential. in pseudo-differential mode, in7 and in8 form the + and - of the differential pair. each input must stay within the specified adc in_ voltage range. 14 14 gpio1 configurable general-purpose input/output 1 15 15 gpio2 configurable general-purpose input/output 2 16 16 rbp adc reference bypass. rbp is an internally generated 1.4v reference for the adc. bypass rbp to gnd with a 2.2? capacitor. do not use rbp to power any additional circuitry. 17 17 sda smbus serial-data, open-drain input/output 18 18 scl smbus serial-clock input 19 19 a0 smbus address input 0. connect to dbp, gnd, or leave unconnected to select the desired device address. 20 20 a1 smbus address input 1. connect to dbp, gnd, or leave unconnected to select the desired device address. max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 11 pin description (continued) pin max16031 MAX16032 name function 21 21 alert smbus alert open-drain output. alert follows the smbalert# signal functionality described in appendix a of the smbus 2.0 specification. alert asserts when the device detects a fault, thereby interrupting the host processor to query which device on the serial bus detected faults. 22 22 overt overtemperature, open-drain output. overt asserts when an overtemperature condition is detected. 23 overc overcurrent, open-drain output. overc asserts when the primary overcurrent threshold is exceeded. 24 24 fault2 configurable open-drain fault output 2 25 25 fault1 configurable open-drain fault output 1 26 26 reset configurable open-drain reset output 27 27 tms jtag test mode select input. internally pulled up to v dbp with a 10k ? resistor. 28 28 tck jtag test clock input 29 29 tdi jtag test data input. internally pulled up to v dbp with a 10k ? resistor. 33 33 tdo jtag test data output 34 34 dbp internal digital voltage regulator output. connect a 1? bypass capacitor from dbp to gnd. do not use dbp to power external circuitry. 36 36 abp internal analog voltage regulator output. connect a 1? bypass capacitor from abp to gnd. do not use abp to power external circuitry. 37, 38 37, 38 v cc device power supply. bypass v cc to gnd with a 1? capacitor. 41 41 cs- current-sense negative input. must be biased between 3v to 28v for proper operation. 42 42 cs+ current-sense positive input. must be biased between 3v to 28v for proper operation. 43 dxn2 remote diode 2 negative input. if remote sensing is not used, connect dxp2 to dxn2. 44 dxp2 remote diode 2 positive input. if remote sensing is not used, connect dxp2 to dxn2. 45 45 dxn1 remote diode 1 negative input. if remote sensing is not used, connect dxp1 to dxn1. 46 46 dxp1 remote diode 1 positive input. if remote sensing is not used, connect dxp1 to dxn1. 48 48 in1 supply monitor input 1. in1 is internally sampled by the adc. it is configurable for unipolar/ bipolar and single-ended/pseudo-differential. in pseudo-differential mode, in1 and in2 form the + and - of the differential pair. each input must stay within the specified adc in_ voltage range. ep exposed paddle. connect ep to ground. ep is internally connected to gnd. do not use as the main ground connection. max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 12 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ functional diagram max16031/ MAX16032 input range selection input range selection input range selection multiplexer input range selection input range selection input range selection input range selection input range selection external temperature sensor circuitry internal temperature sensor circuitry current-sense amplifier/ comparator eeprom smbus serial interface fault comparators 1.4v internal reference digital regulator analog regulator v cc jtag serial interface registers oscillator 10-bit adc abp dbp rbp fault1 fault2 overt reset gpio1 gpio2 sda scl alert a0 a1 tms tck tdi tdo overc in1 in2 in3 in4 in5 in6 *in7 *in8 dxp1 dxn1 *dxp2 *dxn2 *max16031 only *cs+ *cs- max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 13 table 1. address map register address eeprom memory address read/ write description 00h r in1 adc result register (msb) 01h r in1 adc result register (lsb) 02h r in2 adc result register (msb) 03h r in2 adc result register (lsb) 04h r in3 adc result register (msb) 05h r in3 adc result register (lsb) 06h r in4 adc result register (msb) 07h r in4 adc result register (lsb) 08h r in5 adc result register (msb) 09h r in5 adc result register (lsb) 0ah r in6 adc result register (msb) 0bh r in6 adc result register (lsb) 0ch r in7 adc result register (msb)* 0dh r in7 adc result register (lsb)* 0eh r in8 adc result register (msb)* 0fh r in8 adc result register (lsb)* 10h r internal temperature sensor adc result register (msb) 11h r internal temperature sensor adc result register (lsb) 12h r remote temperature sensor 1 adc result register (msb) 13h r remote temperature sensor 1 adc result register (lsb) 14h r remote temperature sensor 2 adc result register (msb) 15h r remote temperature sensor 2 adc result register (lsb) 16h r current-sense adc result register 17h 97h r/w voltage monitoring input adc range selection (in1?n4) 18h 98h r/w voltage monitoring input adc range selection (in5?n8) 19h 99h r/w current-sense gain/primary threshold and remote temperature sensor 1 gain trim 1ah 9ah r/w voltage monitoring input enable 1bh 9bh r/w internal/remote temperature sensor, current sense, and alert enables and remote temperature sensor 1 offset trim 1ch 9ch r/w voltage monitoring input single-ended/differential and unipolar/bipolar selection 1dh 9dh r/w fault1 dependency selection 1eh 9eh r/w fault2 dependency selection 1fh 9fh r/w overt dependency selection 20h a0h r/w reset dependency and timeout selection 21h a1h r/w reset in1?n8 dependency selection 22h a2h r/w gpio1 configuration 23h a3h r/w gpio1 dependency selection 24h a4h r/w gpio2 configuration max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 14 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ register address eeprom memory address read/ write description 25h a5h r/w gpio2 dependency selection 26h a6h r/w in1 primary undervoltage threshold 27h a7h r/w in1 primary overvoltage threshold 28h a8h r/w in1 secondary undervoltage threshold 29h a9h r/w in1 secondary overvoltage threshold 2ah aah r/w in2 primary undervoltage threshold 2bh abh r/w in2 primary overvoltage threshold 2ch ach r/w in2 secondary undervoltage threshold 2dh adh r/w in2 secondary overvoltage threshold 2eh aeh r/w in3 primary undervoltage threshold 2fh afh r/w in3 primary overvoltage threshold 30h b0h r/w in3 secondary undervoltage threshold 31h b1h r/w in3 secondary overvoltage threshold 32h b2h r/w in4 primary undervoltage threshold 33h b3h r/w in4 primary overvoltage threshold 34h b4h r/w in4 secondary undervoltage threshold 35h b5h r/w in4 secondary overvoltage threshold 36h b6h r/w in5 primary undervoltage threshold 37h b7h r/w in5 primary overvoltage threshold 38h b8h r/w in5 secondary undervoltage threshold 39h b9h r/w in5 secondary overvoltage threshold 3ah bah r/w in6 primary undervoltage threshold 3bh bbh r/w in6 primary overvoltage threshold 3ch bch r/w in6 secondary undervoltage threshold 3dh bdh r/w in6 secondary overvoltage threshold 3eh beh r/w in7 primary undervoltage threshold* 3fh bfh r/w in7 primary overvoltage threshold* 40h c0h r/w in7 secondary undervoltage threshold* 41h c1h r/w in7 secondary overvoltage threshold* 42h c2h r/w in8 primary undervoltage threshold* 43h c3h r/w in8 primary overvoltage threshold* 44h c4h r/w in8 secondary undervoltage threshold* 45h c5h r/w in8 secondary overvoltage threshold* 46h c6h r/w internal temperature sensor primary overtemperature threshold (msb) 47h c7h r/w internal temperature sensor secondary overtemperature threshold (msb) 48h c8h r/w remote temperature sensor 1 primary overtemperature threshold 49h c9h r/w remote temperature sensor 1 secondary overtemperature threshold 4ah cah r/w remote temperature sensor 2 primary overtemperature threshold table 1. address map (continued) max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 15 *max16031 only. register address eeprom memory address read/ write description 4bh cbh r/w remote temperature sensor 2 secondary overtemperature threshold 4ch cch r/w overcurrent secondary threshold 4dh cdh r/w remote temperature sensor primary/secondary overtemperature threshold (lsbs). external temperature sensor 2 offset trim 4eh ceh r/w rem ote tem p er atur e s ensor 1/2 p r i m ar y/s econd ar y o ver tem p er atur e thr eshol d ( ls bs) 4fh cfh r/w remote temperature sensor 2 gain trim 50h d0h r/w remote temperature sensor short/open status 51h d1h r/w in1?n8 primary threshold fault status 52h d2h r/w in1?n8 secondary threshold fault status 53h d3h r/w temperature/current threshold fault status 54h d4h r/w remote temperature sensor short/open fault mask 55h d5h r/w in1?n8 primary threshold fault mask 56h d6h r/w in1?n8 secondary threshold fault mask 57h d7h r/w temperature/current threshold fault mask 58h d8h r/w in1?n8 primary undervoltage faults triggering fault eeprom 59h d9h r/w in1?n8 primary overvoltage faults triggering fault eeprom 5ah dah r/w temperature/current faults triggering fault eeprom 5bh dbh r/w temperature filter selection and postboot fault mask time 5ch dch r/w threshold fault options and overcurrent fault timeout 5dh ddh reserved 5eh deh r/w customer firmware version 5fh dfh r/w eeprom and configuration lock 60h?fh e0h?fh reserved 80h r in1?n8 primary threshold fault status at time of fault 81h r in1?n8 secondary threshold fault status at time of fault 82h r temperature/current threshold fault status at time of fault 83h r in1 conversion result at time of fault 84h r in2 conversion result at time of fault 85h r in3 conversion result at time of fault 86h r in4 conversion result at time of fault 87h r in5 conversion result at time of fault 88h r in6 conversion result at time of fault 89h r in7 conversion result at time of fault* 8ah r in8 conversion result at time of fault* 8bh r internal temperature sensor conversion result at time of fault 8ch r remote temperature sensor 1 conversion result at time of fault 8dh r remote temperature sensor 2 conversion result at time of fault* 8eh r current-sense conversion result at time of fault* table 1. address map (continued) max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 16 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ detailed description getting started the max16031/MAX16032 contain both i 2 c/smbus and jtag serial interfaces for accessing registers and eeprom. use only one interface at any given time. for more information on how to access the internal memory through these interfaces, see the i 2 c/smbus-compatible serial interface and jtag serial interface sections. this data sheet uses a specific convention for referring to bits within a particular address location. as an example, r15h[3:0] refers to bits 3 through 0 in register with address 15 hexadecimal. the factory-default values at power-on reset (por) for all eeprom locations are zeros. por occurs when v cc reaches the undervoltage lockout (uvlo) of 2.8v. at por, the device begins a boot-up sequence. during the boot-up sequence, all monitored inputs are masked from initiating faults and eeprom contents are copied to the respective register locations. the boot-up sequence takes up to 1.81ms. monitoring is disabled for up to 16s past the boot-up sequence by programming r5bh[3:0] (see the miscellaneous settings section). reset is low during boot-up and remains low after boot-up for its pro- grammed timeout period after all monitored channels are within their respective thresholds. the max16031/MAX16032 monitor up to eight voltages, up to one current, and up to three temperatures. after boot-up, an internal multiplexer cycles through each input. at each multiplexer stop, the 10-bit adc converts the analog parameter to a digital result and stores the result in a register. each time the multiplexer completes a cycle, internal logic compares the conversion results to the thresholds stored in memory. when a conversion vio- lates a programmed threshold, the conversion is config- ured to generate a fault. logic outputs are programmed to depend on many combinations of faults. additionally, faults are programmed to trigger a fault log, whereby all fault information is automatically written to eeprom. voltage monitoring the max16031 provides eight inputs, in1?n8, for volt- age monitoring. the MAX16032 provides six inputs, in1?n6, for voltage monitoring. each input voltage range is programmable through r17h[7:0] and r18h[7:0] (see table 2). voltage monitoring for each input is enabled through r1ah[7:0] (see table 2). there are four programmable thresholds per voltage monitor input: pri- mary undervoltage, secondary undervoltage, primary overvoltage, and secondary overvoltage. all voltage thresholds are 8 bits wide. only the 8 most significant bits of the conversion result are compared to the thresholds. see the miscellaneous settings section to set the amount of hysteresis for the thresholds. see table 1 for an address map of all voltage monitor input threshold registers. adc inputs are configurable for two different modes: pseudo-differential and single-ended (see table 3). in pseudo-differential mode, two inputs make up a differ- ential pair. psuedo-differential conversions are per- formed by taking a single-ended conversion at each input of a differential pair and then subtracting the results. the pseudo-differential mode is selectable for unipolar or bipolar operation. unipolar differential oper- ation allows only positive polarities of differential volt- ages. bipolar differential operation allows negative and positive polarities of differential voltages. bipolar con- versions are in two? complement format. for example, register address eeprom memory address bit range description [1:0] in1 voltage range selection: 00 = 5.6v, 01 = 2.8v 10 = 1.4v, 11 = reserved [3:2] in2 voltage range selection: 00 = 5.6v, 01 = 2.8v 10 = 1.4v, 11 = reserved [5:4] in3 voltage range selection: 00 = 5.6v, 01 = 2.8v 10 = 1.4v, 11 = reserved 17h 97h [7:6] in4 voltage range selection: 00 = 5.6v, 01 = 2.8v 10 = 1.4v, 11 = reserved table 2. input monitor ranges and enables max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 17 register address eeprom memory address bit range description [1:0] in5 voltage range selection: 00 = 5.6v, 01 = 2.8v 10 = 1.4v, 11 = reserved [3:2] in6 voltage range selection: 00 = 5.6v, 01 = 2.8v 10 = 1.4v, 11 = reserved [5:4] in7 voltage range selection: 00 = 5.6v, 01 = 2.8v 10 = 1.4v, 11 = reserved 18h 98h [7:6] in8 voltage range selection: 00 = 5.6v, 01 = 2.8v 10 = 1.4v, 11 = reserved [0] in1 monitoring enable: 0 = in1 monitoring disabled 1 = in1 monitoring enabled [1] in2 monitoring enable: 0 = in2 monitoring disabled 1 = in2 monitoring enabled [2] in3 monitoring enable: 0 = in3 monitoring disabled 1 = in3 monitoring enabled [3] in4 monitoring enable: 0 = in4 monitoring disabled 1 = in4 monitoring enabled [4] in5 monitoring enable: 0 = in5 monitoring disabled 1 = in5 monitoring enabled [5] in6 monitoring enable: 0 = in6 monitoring disabled 1 = in6 monitoring enabled [6] in7 monitoring enable: 0 = in7 monitoring disabled 1 = in7 monitoring enabled 1ah 9ah [7] in8 monitoring enable: 0 = in8 monitoring disabled 1 = in8 monitoring enabled table 2. input monitor ranges and enables (continued) max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 18 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ register address eeprom memory address bit range description [0] in1/in2 single-ended/pseudo-differential: 0 = in1 and in2 conversions are single-ended. 1 = in1 and in2 conversions are pseudo-differential (in1 to in2). [1] in3/in4 single-ended/pseudo-differential: 0 = in3 and in4 conversions are single-ended. 1 = in3 and in4 conversions are pseudo-differential (in3 to in4). [2] in5/in6 single-ended/pseudo-differential: 0 = in5 and in6 conversions are single-ended. 1 = in5 and in6 conversions are pseudo-differential (in5 to in6). [3] in7/in8 single-ended/pseudo-differential: 0 = in7 and in8 conversions are single-ended. 1 = in7 and in8 conversions are pseudo-differential (in7 to in8). [4] in1/in2 unipolar/bipolar: 0 = in1 and in2 conversions are unipolar. 1 = in1 and in2 conversions are bipolar (two? complement). [5] in3/in4 unipolar/bipolar: 0 = in3 and in4 conversions are unipolar. 1 = in3 and in4 conversions are bipolar (two? complement). [6] in5/in6 unipolar/bipolar: 0 = in5 and in6 conversions are unipolar. 1 = in5 and in6 conversions are bipolar (two? complement). 1ch 9ch [7] in7/in8 unipolar/bipolar: 0 = in7 and in8 conversions are unipolar. 1 = in7 and in8 conversions are bipolar (two? complement). table 3. in1?n8 adc input mode selection a -1v differential input (range of 5.6v) gives a decimal code of -183, which is 1101001001 in two? comple- ment binary form. in single-ended mode, conversions are performed between a single input and ground. when single-ended mode is selected, conversions are always unipolar regardless of r1ch[7:4]. the single- ended and pseudo-differential adc mode equations are shown below. unipolar single-ended mode: where x adc is the resulting code in decimal, v in is the voltage at a voltage monitoring input, and v range is the selected range programmed in r17h and r18h. bipolar/unipolar pseudo-differential mode: where x adc is the resulting code in decimal, v in+ is the voltage at a positive input of a differential voltage moni- toring input pair, v in- is the voltage at a negative input of a differential voltage monitoring input pair, and v range is the selected range programmed in r17h and r18h. x int v v int v v adc in ref in ref = ? ? ? ? ? ? ? ? ? ? ? ? ? +? 1024 1024 x int v v adc in ref = ? ? ? ? ? ? ? 1024 max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 19 current monitoring the max16031 provides current-sense inputs cs+/cs- and a current-sense amplifier for current monitoring (see figure 3). there are two programmable current- sense thresholds: primary overcurrent and secondary overcurrent. for fast fault detection, the primary over- current threshold is implemented with an analog com- parator connected to the overc output. the primary threshold equation is: where i th is the current threshold to be set, v csth is the threshold set by r19h[1:0], and r sense is the value of the sense resistor. see table 4 for a description of r19h. the adc output for a current-sense conversion is: where x adc is the 8-bit decimal adc result, v sense is v cs+ - v cs- , a v is the current-sense voltage gain set by r19h[1:0], and v rbp is the reference voltage at rbp (1.4v typical). overc is latched when the primary overcurrent thresh- old is exceeded by programming r5ch[4]. the latch is cleared by writing a ??to r53h[6]. overc depends only on the primary overcurrent threshold. other fault outputs are programmed to depend on the secondary overcurrent threshold. the secondary overcurrent threshold is implemented through adc conversions and digital comparisons. the secondary overcurrent threshold contains programmable time delay options located in r5ch[1:0]. primary and secondary current- sense faults are enabled/disabled through r1bh[3]. temperature monitoring the max16031 provides two sets of remote diode inputs, dxp1/dxn1 and dxp2/dxn2, and one internal tempera- ture sensor. the MAX16032 provides one set, dxp1/dxn1, and one internal temperature sensor. calibration registers provide adjustments for gain and off- set to accommodate different types of remote diodes. the internal temperature sensor circuitry is factory trimmed. in addition to offset/gain trimming, a program- mable lowpass filter is provided. see figure 4 for the block diagram of the temperature sensor circuitry. the remote diode is actually a diode-connected transistor. see application notes an1057 and an1944 for informa- tion on error budget and several transistor manufacturers. x va v adc sense v rbp = () ? 21 8 i v r th csth sense = + - + + - - *a v cs+ cs- *v csth *adjustable by r19h [1:0] r sense to adc mux v mon load v l overc max16031 figure 3. current-sense block diagram register address eeprom memory address bit range description [1:0] overcurrent primary threshold and current-sense gain setting: 00 = 200mv threshold, a v = 6v/v 01 = 100mv threshold, a v = 12v/v 10 = 50mv threshold, a v = 24v/v 11 = 25mv threshold, a v = 48v/v 19h 99h [7:2] remote temperature sensor 1 gain trim. note bit 6 is inverted. [5:0] remote temperature sensor 1 gain trim 4fh cfh [7:6] not used table 4. overcurrent primary threshold and remote temperature sense gain trim max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 20 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ the adc converts the internal sensor and remote sen- sor amplifier outputs. each time the adc converts all enabled parameters, the temperature conversions are compared to the temperature threshold registers (r46h to r4bh and r4dh). unlike the voltage input compara- tors, the temperature threshold comparators are 10 bits wide. overt is the designated output for temperature faults, although other outputs are programmed to depend on temperature faults as well. see the programmable inputs/outputs section for more informa- tion on programming output dependencies. see the faults section for more information on setting tempera- ture fault thresholds. the remote temperature sensor amplifier detects a short or open between dxp_ and dxn_. the detection of these events is programmed to cause a fault. temperature thresholds and conversions are in a two? complement temperature format, where 1 lsb corre- sponds to 0.5?. the data format for temperature con- versions is illustrated in table 5. offset and gain errors for remote temperature sensor measurements are user-trimmed through gain registers r19h[7:2]/r4fh[5:0] and offset registers r1bh[7:5]/r4d[6:4], as shown in tables 4 and 6. the gain value trims the high (56?) drive current source to compensate for the n-factor of the remote diode. the offset value is multi- plied by 4 and added to the conversion result numeri- cally. the max16031/MAX16032 contain an internal lowpass filter at dxn_ and dxp_ to reduce noise. see the miscellaneous settings section for more information on programming the filter cutoff frequency. reading adc results adc conversion results are read from the adc conver- sion registers through the i 2 c/smbus-compatible or jtag interfaces (see table 7). these registers are also used for fault threshold comparison. voltage monitoring thresholds are compared with only the first 8 msbs of the conversion results. programmable inputs/outputs the max16031 provides two general fault outputs, fault1 and fault2 , one reset output reset , one temperature fault output overt , one current fault out- put overc , two general-purpose inputs/outputs gpio1 and gpio2, and one smbalert#-compatible output alert . the MAX16032 provides the same except overc . all outputs are open drain and require pullup resistors. fault outputs do not latch except for overc , which either latches or does not latch depending on the configuration bit in r5ch. individual fault flag bits, how- ever, latch (see the faults section) and must be cleared one bit at a time by writing a byte containing all zeros except for a single ??in the bit to be cleared. the general outputs, fault1 and fault2 , are identi- cal in functionality and are programmed to depend on overvoltage, undervoltage, overtemperature, and over- current parameters. see r1dh and r1eh in table 8 for more detailed information regarding the general fault output dependencies. the reset output reset provides many programmable output dependencies as well as reset timeouts. see r20h and r21h in table 8 for detailed information on reset output dependencies and timeouts. the temperature fault output overt indicates tempera- ture-related faults. overt is programmed to depend on any primary temperature threshold and/or the remote diode open/short flags. overt latches low dur- + - to adc mux v bias ~ 100mv i bias dxp_ dxn_ abp abp i high i low figure 4. remote temperature sensor amplifier circuitry temperature (?) digital code +128 1100000000 +125 1011111010 +100 1011010000 +25.5 1000110011 0 1000000000 -10 0111101100 -75 0101101010 -100 0100111000 -128 0100000000 diode fault 0000000000 table 5. temperature data format max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 21 ing diode open/short fault conditions, and the corre- sponding diode open/short flags must be cleared to release the latch. see r1fh in table 8 for more informa- tion on overt output dependencies. the current fault output overc indicates overcurrent events. overc only depends on the primary analog overcurrent threshold. see the current monitoring sec- tion for more information about the current-sense amplifi- er and the primary threshold. the secondary overcurrent threshold is set digitally and is used by other outputs. the secondary threshold also has a programmable time- out option (see miscellaneous settings section). gpio1 and gpio2 are programmable as logic inputs, manual reset inputs, logic outputs, or fault dependent outputs. see r22h?25h in table 8 for more detailed information on gpio1/gpio2 functionality. gpio1 and gpio2 assert low when configured as a fault output. alert is an smbalert#-compatible fault interrupt output. when enabled, it is logically anded with out- puts reset , fault1 , fault2 , overt , overc , and gpio1/gpio2 (only if enabled as fault outputs). when any fault output is asserted, alert also asserts, inter- rupting the smbus master to query the fault. the mas- ter needs to answer max16031/MAX16032 with a specific smbus command (ara) to retrieve the slave address of the interrupting device. see the i 2 c/smbus- compatible serial interface section for more details. register address eeprom memory address bit range description [0] internal temperature sensor faults enable: 0 = internal temperature sensor faults disabled 1 = internal temperature sensor faults enabled [1] remote temperature sensor 1 faults enable: 0 = remote temperature sensor 1 faults disabled 1 = internal temperature sensor 1 faults enabled [2] remote temperature sensor 2 faults enable: 0 = remote temperature sensor 2 faults disabled 1 = remote temperature sensor 2 faults enabled [3] current-sense fault enable: 0 = current-sense faults disabled 1 = current-sense faults enabled [4] smbalert# enable ( alert ): 0 = smbalert# disabled 1 = smbalert# enabled 1bh 9bh [7:5] remote temperature sensor 1 offset trim: offset = 4 x, where x is the two?-complement 3-bit temperature code (1 lsb = 0.5?). since x is multiplied by 4, the offset lsb size is 2?, allowing a total offset adjustment of ??. [1:0] internal temperature sensor primary overtemperature threshold lsb [3:2] inter nal tem p er atur e s ensor s econd ar y o ver tem p er atur e thr eshol d ls b [6:4] remote temperature sensor 2 offset trim: offset = 4 x, where x is the two?-complement 3-bit temperature code (1 lsb = 0.5?). since x is multiplied by 4, the offset lsb size is 2?, allowing a total offset adjustment of ??. 4dh cdh [7] not used. table 6. temperature sensor fault enable, current-sense fault enable, smbalert# enable, and temperature offset trim max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 22 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ register address eeprom memory address bit range description 00h [7:0] in1 adc conversion result (msb) [1:0] in1 adc conversion result (lsb) 01h [7:2] reserved 02h [7:0] in2 adc conversion result (msb) [1:0] in2 adc conversion result (lsb) 03h [7:2] reserved 04h [7:0] in3 adc conversion result (msb) [1:0] in3 adc conversion result (lsb) 05h [7:2] reserved 06h [7:0] in4 adc conversion result (msb) [1:0] in4 adc conversion result (lsb) 07h [7:2] reserved 08h [7:0] in5 adc conversion result (msb) [1:0] in5 adc conversion result (lsb) 09h [7:2] reserved 0ah [7:0] in6 adc conversion result (msb) [1:0] in6 adc conversion result (lsb) 0bh [7:2] reserved 0ch [7:0] in7 adc conversion result (msb) [1:0] in7 adc conversion result (lsb) 0dh [7:2] reserved 0eh [7:0] in8 adc conversion result (msb) [1:0] in8 adc conversion result (lsb) 0fh [7:2] reserved 10h [7:0] internal temperature sensor adc conversion result (msb) [1:0] internal temperature sensor adc conversion result (lsb) 11h [7:2] reserved 12h [7:0] remote temperature sensor 1 adc conversion result (msb) [1:0] remote temperature sensor 1 adc conversion result (lsb) 13h [7:2] reserved 14h [7:0] remote temperature sensor 2 adc conversion result (msb) [1:0] remote temperature sensor 2 adc conversion result (lsb) 15h [7:2] reserved 16h [7:0] current-sense adc conversion result table 7. adc conversion registers max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 23 register address eeprom memory address bit range description [0] 1 = fault1 depends on the secondary undervoltage thresholds of all enabled in1?n8. [1] 1 = fault1 depends on the primary overvoltage thresholds of all enabled in1?n8. [2] 1 = fault1 depends on the secondary overvoltage thresholds of all enabled in1?n8. [3] 1 = fault1 depends on the secondary overtemperature threshold of the internal temperature sensor. [4] 1 = fault1 depends on the secondary overtemperature threshold of remote temperature sensor 1. [5] 1 = fault1 depends on the secondary overtemperature threshold of remote temperature sensor 2. [6] 1 = fault1 depends on the secondary overcurrent threshold. 1dh 9dh [7] reserved [0] 1 = fault2 depends on the secondary undervoltage thresholds of all enabled in1?n8. [1] 1 = fault2 depends on the primary overvoltage thresholds of all enabled in1?n8. [2] 1 = fault2 depends on the secondary overvoltage thresholds of all enabled in1?n8. [3] 1 = fault2 depends on the secondary overtemperature threshold of the internal temperature sensor. [4] 1 = fault2 depends on the secondary overtemperature threshold of remote temperature sensor 1. [5] 1 = fault2 depends on the secondary overtemperature threshold of remote temperature sensor 2. [6] 1 = fault2 depends on the secondary overcurrent threshold. 1eh 9eh [7] reserved [0] 1 = overt depends on the primary overtemperature threshold of the internal temperature sensor. [1] 1 = overt depends on the primary overtemperature threshold of the remote temperature sensor 1. 1fh 9fh [2] 1 = overt depends on the primary overtemperature threshold of the remote temperature sensor 2. table 8. output dependencies max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 24 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ register address eeprom memory address bit range description [3] 1 = overt depends on the diode short flag of remote temperature sensor 1. overt latches when the diode is shorted. clear the latch by writing to r50h. [4] 1 = overt depends on the diode open flag of remote temperature sensor 1. overt latches when the diode is open. clear the latch by writing to r50h. [5] 1 = overt depends on the diode short flag of remote temperature sensor 2. overt latches when the diode is shorted. clear the latch by writing to r50h. [6] 1 = overt depends on the diode open flag of remote temperature sensor 2. overt latches when the diode is open. clear the latch by writing to r50h. 1fh 9fh [7] reserved [2:0] reset configuration: 000 = reset has no dependencies; asserts during boot and boot-up timeout and then deasserts indefinitely. 001 = reset depends on the primary undervoltage thresholds at inputs that are selected by r21h[7:0]. 010 = reset depends on the primary overvoltage thresholds at inputs that are selected by r21h[7:0]. 011 = reset depends on both the primary undervoltage and overvoltage thresholds at those inputs that are selected by r21h[7:0]. 100 = reset depends on the primary undervoltage thresholds at inputs that are selected by r21h[7:0] and the internal temperature sensor primary overtemperature threshold. 101 = reset depends on both the primary undervoltage and overvoltage thresholds at those inputs that are selected by r21h[7:0] and the internal temperature sensor primary overtemperature threshold. 110 = reset depends on the primary undervoltage thresholds at inputs that are selected by r21h[7:0] and each internal/remote temperature sensor primary overtemperature threshold. 111 = reset depends on both the primary undervoltage and overvoltage thresholds at those inputs that are selected by r21h[7:0] and each internal/remote temperature sensor primary overtemperature threshold. [5:3] reset timeout : 000 = 25? 001 = 2.5ms 010 = 10ms 011 = 40ms 100 = 160ms 101 = 640ms 110 = 1280ms 111 = 2560ms 20h a0h [7:6] reserved table 8. output dependencies (continued) max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 25 table 8. output dependencies (continued) register address eeprom memory address bit range description [0] 1 = reset depends on in1 with thresholds defined by r20h[2:0]. [1] 1 = reset depends on in2 with thresholds defined by r20h[2:0]. [2] 1 = reset depends on in3 with thresholds defined by r20h[2:0]. [3] 1 = reset depends on in4 with thresholds defined by r20h[2:0]. [4] 1 = reset depends on in5 with thresholds defined by r20h[2:0]. [5] 1 = reset depends on in6 with thresholds defined by r20h[2:0]. [6] 1 = reset depends on in7 with thresholds defined by r20h[2:0]. 21h a1h [7] 1 = reset depends on in8 with thresholds defined by r20h[2:0]. [2:0] gpio1 output dependencies: 000 = gpio1 is a digital input that is read from r22h[7]. 001 = gpio1 is a digital manual reset input that asserts reset when asserted. the state of gpio1 is read from r22h[7]. 010 = gpio1 is a digital output that is written to through r22h[6]. 011 = gpio1 is a digital fault output that depends on conditions selected by r23h[6:0]. 100 = gpio1 is a digital output that depends on primary thresholds at the input selected by r22h[5:3]. 101 =gpio1 is a digital output that depends on primary thresholds at the input selected by r22h[5:3] and on conditions selected by r23h[6:0]. 110 = reserved 111 = reserved [5:3] gpio1 single-input primary threshold voltage monitor (r22h[2:0] = 100 or 101 only). gpio1 asserts low when any primary threshold of this input is exceeded: 000 = in1 001 = in2 010 = in3 011 = in4 100 = in5 101 = in6 110 = in7 111 = in8 [6] gpio1 output (write to this bit): 1 = gpio1 is set high if gpio1 is configured as an output. 0 = gpio1 is set low if gpio1 is configured as an output. 22h a2h [7] gpio1 input state (read from this bit): 1 = indicates that gpio1 is high regardless if gpio1 is set as an output or input. 0 = indicates that gpio1 is low regardless if gpio1 is set as an output or input. max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 26 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ table 8. output dependencies (continued) register address eeprom memory address bit range description [0] 1 = gpio1 depends on the secondary undervoltage thresholds of all enabled in1?n8. [1] 1 = gpio1 depends on the primary overvoltage thresholds of all enabled in1?n8. [2] 1 = gpio1 depends on the secondary overvoltage thresholds of all enabled in1?n8. [3] 1 = gpio1 depends on the secondary overtemperature threshold of the internal temperature sensor. [4] 1 = gpio1 depends on the secondary overtemperature threshold of remote temperature sensor 1. [5] 1 = gpio1 depends on the secondary overtemperature threshold of remote temperature sensor 2. [6] 1 = gpio1 depends on the secondary overcurrent threshold. 23h a3h [7] reserved [2:0] gpio2 output dependencies: 000 = gpio2 is a digital input that is read from r24h[7]. 001 = gpio2 is a digital manual reset input that asserts reset when asserted. the state of gpio2 is read from r24h[7]. 010 = gpio2 is a digital output that is written to through r24h[6]. 011 = gpio2 is a digital fault output that depends on conditions selected by r25h[6:0]. 100 = gpio2 is a digital output that depends on primary thresholds at the input selected by r24h[5:3]. 101 = gpio2 is a digital output that depends on primary thresholds at the input selected by r24h[5:3] and on conditions selected by r25h[6:0]. 110 = reserved 111 = reserved [5:3] gpio2 single-input primary threshold voltage monitor (r24h[2:0] = 100 or 101 only). gpio2 asserts low when the primary threshold of this input is exceeded: 000 = in1 001 = in2 010 = in3 011 = in4 100 = in5 101 = in6 110 = in7 111 = in8 [6] gpio2 output (write to this bit): 1 = gpio2 is set high if gpio2 is configured as an output. 0 = gpio2 is set low if gpio2 is configured as an output. 24h a4h [7] gpio2 input (read from this bit): 1 = indicates that gpio2 is high regardless if gpio2 is set as an output or input. 0 = indicates that gpio2 is low regardless if gpio2 is set as an output or input. max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 27 faults the max16031/MAX16032 offer many configurable options for detecting and managing system faults. fault thresholds are set in r26h?4eh, as shown in table 9. any threshold that is configured to cause a fault can be masked at any time from causing a fault by setting bits in r54h?57h, as shown in table 10. fault flags indicate the fault status of a particular input. the fault flag of any monitored input in the device can be read at any time from r50h?53h, as shown in table 11. clear a fault flag by writing a ??to the appropriate bit in the flag register. table 8. output dependencies (continued) register address eeprom memory address bit range description [0] 1 = gpio2 depends on the secondary undervoltage thresholds of all enabled in1?n8. [1] 1 = gpio2 depends on the primary overvoltage thresholds of all enabled in1?n8. [2] 1 = gpio2 depends on the secondary overvoltage thresholds of all enabled in1?n8. [3] 1 = gpio2 depends on the secondary overtemperature threshold of the internal temperature sensor. [4] 1 = gpio2 depends on the secondary overtemperature threshold of remote temperature sensor 1. [5] 1 = gpio2 depends on the secondary overtemperature threshold of remote temperature sensor 2. [6] 1 = gpio2 depends on the secondary overcurrent threshold. 25h a5h [7] reserved table 9. fault thresholds register address eeprom memory address bit range description 26h a6h [7:0] in1 primary undervoltage threshold 27h a7h [7:0] in1 primary overvoltage threshold 28h a8h [7:0] in1 secondary undervoltage threshold 29h a9h [7:0] in1 secondary overvoltage threshold 2ah aah [7:0] in2 primary undervoltage threshold 2bh abh [7:0] in2 primary overvoltage threshold 2ch ach [7:0] in2 secondary undervoltage threshold 2dh adh [7:0] in2 secondary overvoltage threshold 2eh aeh [7:0] in3 primary undervoltage threshold 2fh afh [7:0] in3 primary overvoltage threshold 30h b0h [7:0] in3 secondary undervoltage threshold 31h b1h [7:0] in3 secondary overvoltage threshold 32h b2h [7:0] in4 primary undervoltage threshold 33h b3h [7:0] in4 primary overvoltage threshold max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 28 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ table 9. fault thresholds (continued) register address eeprom memory address bit range description 34h b4h [7:0] in4 secondary undervoltage threshold 35h b5h [7:0] in4 secondary overvoltage threshold 36h b6h [7:0] in5 primary undervoltage threshold 37h b7h [7:0] in5 primary overvoltage threshold 38h b8h [7:0] in5 secondary undervoltage threshold 39h b9h [7:0] in5 secondary overvoltage threshold 3ah bah [7:0] in6 primary undervoltage threshold 3bh bbh [7:0] in6 primary overvoltage threshold 3ch bch [7:0] in6 secondary undervoltage threshold 3dh bdh [7:0] in6 secondary overvoltage threshold 3eh beh [7:0] in7 primary undervoltage threshold 3fh bfh [7:0] in7 primary overvoltage threshold 40h c0h [7:0] in7 secondary undervoltage threshold 41h c1h [7:0] in7 secondary overvoltage threshold 42h c2h [7:0] in8 primary undervoltage threshold 43h c3h [7:0] in8 primary overvoltage threshold 44h c4h [7:0] in8 secondary undervoltage threshold 45h c5h [7:0] in8 secondary overvoltage threshold 46h c6h [7:0] internal temperature sensor primary overtemperature threshold msb (2 lsbs are in r4dh[1:0]). 47h c7h [7:0] internal temperature sensor secondary overtemperature threshold msb (2 lsbs are in r4dh[3:2]). 48h c8h [7:0] remote temperature sensor 1 primary overtemperature threshold msb (2 lsbs are in r4eh[1:0]). 49h c9h [7:0] remote temperature sensor 1 secondary overtemperature threshold msb (2 lsbs are in r4eh[3:2]). 4ah cah [7:0] remote temperature sensor 2 primary overtemperature threshold msb (2 lsbs are in r4eh[5:4]). 4bh cbh [7:0] remote temperature sensor 2 secondary overtemperature threshold msb (2 lsbs are in r4eh[7:6]). 4ch cch [7:0] current-sense secondary threshold [1:0] internal temperature sensor primary overtemperature threshold lsb [3:2] internal temperature sensor secondary overtemperature threshold lsb [6:4] remote temperature sensor 2, offset trim 4dh cdh [7] not used [1:0] remote temperature sensor 1 primary overtemperature threshold lsb [3:2] remote temperature sensor 1 secondary overtemperature threshold lsb [5:3] remote temperature sensor 2 primary overtemperature threshold lsb 4eh ceh [7:6] remote temperature sensor 2 secondary overtemperature threshold lsb max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 29 table 10. fault masks register address eeprom memory address bit range description [0] 1 = short-circuit detection at remote temperature sensor 1 is masked. [1] 1 = open-circuit detection at remote temperature sensor 1 is masked. [2] 1 = short-circuit detection at remote temperature sensor 2 is masked. [3] 1 = open-circuit detection at remote temperature sensor 2 is masked. 54h d4h [7:4] not used. [0] 1 = in1 primary overvoltage and undervoltage faults are masked. [1] 1 = in2 primary overvoltage and undervoltage faults are masked. [2] 1 = in3 primary overvoltage and undervoltage faults are masked. [3] 1 = in4 primary overvoltage and undervoltage faults are masked. [4] 1 = in5 primary overvoltage and undervoltage faults are masked. [5] 1 = in6 primary overvoltage and undervoltage faults are masked. [6] 1 = in7 primary overvoltage and undervoltage faults are masked. 55h d5h [7] 1 = in8 primary overvoltage and undervoltage faults are masked. [0] 1 = in1 secondary overvoltage and undervoltage faults are masked. [1] 1 = in2 secondary overvoltage and undervoltage faults are masked. [2] 1 = in3 secondary overvoltage and undervoltage faults are masked. [3] 1 = in4 secondary overvoltage and undervoltage faults are masked. [4] 1 = in5 secondary overvoltage and undervoltage faults are masked. [5] 1 = in6 secondary overvoltage and undervoltage faults are masked. [6] 1 = in7 secondary overvoltage and undervoltage faults are masked. 56h d6h [7] 1 = in1 secondary overvoltage and undervoltage faults are masked. [0] 1 = internal temperature sensor primary overtemperature fault masked. [1] 1 = remote temperature sensor 1 primary overtemperature fault masked. [2] 1 = remote temperature sensor 2 primary overtemperature fault masked. [3] 1 = internal temperature sensor secondary overtemperature fault masked. [4] 1 = remote temperature sensor 1 secondary overtemperature fault masked. [5] 1 = remote temperature sensor 2 secondary overtemperature fault masked. [6] 1 = current-sense primary overcurrent fault masked. 57h d7h [7] 1 = current-sense secondary overcurrent fault masked. max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 30 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ table 11. fault flags register address eeprom memory address bit range description [0] 1 = short circuit detected at remote temperature sensor 1. [1] 1 = open circuit detected at remote temperature sensor 1. [2] 1 = short circuit detected at remote temperature sensor 2. [3] 1 = open circuit detected at remote temperature sensor 2. 50h d0h [7:4] not used. [0] 1 = in1 conversion result exceeds primary overvoltage or undervoltage thresholds. [1] 1 = in2 conversion result exceeds primary overvoltage or undervoltage thresholds. [2] 1 = in3 conversion result exceeds primary overvoltage or undervoltage thresholds. [3] 1 = in4 conversion result exceeds primary overvoltage or undervoltage thresholds. [4] 1 = in5 conversion result exceeds primary overvoltage or undervoltage thresholds. [5] 1 = in6 conversion result exceeds primary overvoltage or undervoltage thresholds. [6] 1 = in7 conversion result exceeds primary overvoltage or undervoltage thresholds. 51h d1h [7] 1 = in8 conversion result exceeds primary overvoltage or undervoltage thresholds. [0] 1 = in1 conversion result exceeds secondary overvoltage or undervoltage thresholds. [1] 1 = in2 conversion result exceeds secondary overvoltage or undervoltage thresholds. [2] 1 = in3 conversion result exceeds secondary overvoltage or undervoltage thresholds. [3] 1 = in4 conversion result exceeds secondary overvoltage or undervoltage thresholds. [4] 1 = in5 conversion result exceeds secondary overvoltage or undervoltage thresholds. [5] 1 = in6 conversion result exceeds secondary overvoltage or undervoltage thresholds. [6] 1 = in7 conversion result exceeds secondary overvoltage or undervoltage thresholds. 52h d2h [7] 1 = in8 conversion result exceeds secondary overvoltage or undervoltage thresholds. [0] 1 = internal temperature sensor conversion exceeds its primary overtemperature threshold. [1] 1 = remote temperature sensor 1 conversion exceeds its primary overtemperature threshold. [2] 1 = remote temperature sensor 2 conversion exceeds its primary overtemperature threshold. [3] 1 = internal temperature sensor conversion exceeds its secondary overtemperature threshold. [4] 1 = remote temperature sensor 1 conversion exceeds its secondary overtemperature threshold. [5] 1 = remote temperature sensor 2 conversion exceeds its secondary overtemperature threshold. [6] 1 = current-sense conversion exceeds its primary overcurrent threshold. 53h d3h [7] 1 = current-sense conversion exceeds its secondary overcurrent threshold. max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 31 fault logging if a specific input threshold is critical to the operation of the system, an automatic fault log is configured to trig- ger a transfer of fault information to eeprom. the fault log dependencies are configured through r58h?5ah, as shown in table 12. logged fault information is read from eeprom locations r80h?8eh, as shown in table 13. once a fault log event occurs, the fault log feature is locked and must be reset to enable a new fault log to be stored. write a ??to r5fh[1] to reset the fault log. fault information always contains the fault flag registers and is configured to also include the adc result regis- ters through r5ch[7] (see the miscellaneous settings section). all stored adc results are the 8 msbs of the result. miscellaneous settings table 14 shows several miscellaneous programmable items. register r5bh contains boot-up timeout and remote temperature sensor filter cutoff settings. register r5ch[1:0] sets the secondary overcurrent threshold timeout, which is the amount of delay after an overcurrent condition before the overcurrent condition becomes a fault. all voltage thresholds include two selectable hysteresis options programmed by r5ch[5]. when r5ch[6] = 1, the conditions programmed to cause a fault log event must happen for two consecu- tive adc cycles rather than just one to provide an improvement in noise immunity. register r5ch[7] con- trols whether the adc result registers are stored in eeprom after a fault log. register r5eh provides stor- age space for a user-defined configuration or firmware version number. register r5fh[0] locks and unlocks the eeprom and register set. register r5fh[1] indicates whether a fault log event occurred and the correspond- ing fault information is locked in eeprom. further fault log conditions will not write new fault information to the fault eeprom until a ??is written to r5fh[1]. table 12. fault log dependency register address eeprom memory address bit range description [0] 1 = fault log triggered when in1 is below its primary undervoltage threshold. [1] 1 = fault log triggered when in2 is below its primary undervoltage threshold. [2] 1 = fault log triggered when in3 is below its primary undervoltage threshold. [3] 1 = fault log triggered when in4 is below its primary undervoltage threshold. [4] 1 = fault log triggered when in5 is below its primary undervoltage threshold. [5] 1 = fault log triggered when in6 is below its primary undervoltage threshold. [6] 1 = fault log triggered when in7 is below its primary undervoltage threshold. 58h d8h [7] 1 = fault log triggered when in8 is below its primary undervoltage threshold. [0] 1 = fault log triggered when in1 is above its primary overvoltage threshold. [1] 1 = fault log triggered when in2 is above its primary overvoltage threshold. [2] 1 = fault log triggered when in3 is above its primary overvoltage threshold. [3] 1 = fault log triggered when in4 is above its primary overvoltage threshold. [4] 1 = fault log triggered when in5 is above its primary overvoltage threshold. [5] 1 = fault log triggered when in6 is above its primary overvoltage threshold. [6] 1 = fault log triggered when in7 is above its primary overvoltage threshold. 59h d9h [7] 1 = fault log triggered when in8 is above its primary overvoltage threshold. [0] 1 = fault log triggered when current sense is above its primary overcurrent threshold. [1] 1 = faul t l og tr i g g er ed w hen i nter nal tem p er atur e sensor i s ab ove i ts over tem p er atur e thr eshol d . [2] 1 = faul t l og tr i g g er ed w hen r em ote tem p er atur e sensor 1 i s ab ove i ts over tem p er atur e thr eshol d . [3] 1 = faul t l og tr i g g er ed w hen r em ote tem p er atur e sensor 2 i s ab ove i ts over tem p er atur e thr eshol d . 5ah dah [7:4] not used. max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 32 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ table 13. fault log eeprom register address eeprom memory address bit range description 80h [7:0] copy of r51h[7:0] at the time the fault log was triggered. 81h [7:0] copy of r52h[7:0] at the time the fault log was triggered. 82h [7:0] copy of r53h[7:0] at the time the fault log was triggered. 83h [7:0] in1 conversion result at the time the fault log was triggered. 84h [7:0] in2 conversion result at the time the fault log was triggered. 8 msbs only. 85h [7:0] in3 conversion result at the time the fault log was triggered. 8 msbs only. 86h [7:0] in4 conversion result at the time the fault log was triggered. 8 msbs only. 87h [7:0] in5 conversion result at the time the fault log was triggered. 8 msbs only. 88h [7:0] in6 conversion result at the time the fault log was triggered. 8 msbs only. 89h [7:0] in7 conversion result at the time the fault log was triggered. 8 msbs only. 8ah [7:0] in8 conversion result at the time the fault log was triggered. 8 msbs only. 8bh [7:0] internal temperature sensor conversion result at the time the fault log was triggered. 8 msbs from 10-bit adc conversion. 8ch [7:0] remote temperature sensor 1 conversion result at the time the fault log was triggered. 8 msbs from 10-bit adc conversion. 8dh [7:0] remote temperature sensor 2 conversion result at the time the fault log was triggered. 8 msbs from 10-bit adc conversion. 8eh [7:0] current-sense conversion result at the time the fault log was triggered. i 2 c/smbus-compatible serial interface the max16031/MAX16032 feature an i 2 c/smbus-com- patible 2-wire (sda and scl) serial interface for com- munication with a master device. all possible communication formats are shown in figure 5. the slave address and smbalert# are described further in the following subsections. figure 1 shows a detailed 2-wire interface timing diagram. for descriptions of the i 2 c and smbus protocol and terminology, refer to the i 2 c-bus specification version 2.1 and the system management bus (smbus) specification version 2.0. the max16031/MAX16032 allow 2-wire communication up to 400khz. sda and scl require external pullup resistors. slave address the slave address inputs, a0 and a1, are each capa- ble of detecting three different states, allowing nine identical devices to share the same serial bus. connect a0 and a1 to gnd, dbp, or leave as not connected (n.c.). see table 15 for a listing of all possible 7-bit address input connections and their corresponding serial-bus addresses. smbalert# smbalert# is an optional interrupt signal defined in appendix a of the smbus specification. the max16031/MAX16032 provide output alert as this interrupt signal. if enabled, alert asserts if any one of the following outputs asserts: fault1 , fault2 , reset , overt , or overc . additionally, if a gpio_ is configured for a fault output, a fault at this output also causes alert to assert. alert deasserts when all fault conditions are removed (i.e., when all fault outputs are high). typically alert is connected to all other smbalert# open-drain signals in the system, creating a wired-or function with all smbalert# outputs. when the master is interrupted by its smbalert# input, it stops or fin- ishes the current bus transfer and places an alert response address (ara) on the bus. the slave that pulled the smbalert# signal low acknowledges the ara and places its own address on the bus, identifying itself to the master as the slave that caused the inter- rupt. the 7-bit ara is ?001100?and the r/ w bit is a don? care. max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 33 send byte format s address slave address: address of the slave on the serial interface bus. data byte: presets the internal address pointer or represents a command. r/w ack command ack p 7 bits 0 8 bits receive byte format s address slave address: address of the slave on the serial interface bus. data byte: data is read from the location pointed to by the internal address pointer. r/w ack data nack p 7 bits 1 8 bits write byte format s address slave address: address of the slave on the serial interface bus. command byte: sets the internal address pointer. r/w ack command ack 7 bits 0 8 bits data byte: data is written to the locations set by the internal address pointer. data ack p 8 bits read byte format s slave address slave address: address of the slave on the serial interface bus. command byte: sets the internal address pointer. r/w ack command ack 7 bits 0 8 bits data byte: data is written to the locations set by the internal address pointer. sr slave address r/w 7 bits 1 block write format s address slave address: address of the slave on the serial interface bus. command byte: fah data byte: data is written to the locations set by the internal address pointer. wr ack command ack 7 bits 0 8 bits byte count = n ack p 8 bits data byte 1 ack 8 bits data byte n ack 8 bits data byte ack ack data byte 8 bits 8 bits wr wr smbalert# alert response address: only the device that interrupted the master responds to this address. slave address: slave places its own address on the serial bus. s address r/w ack data nack p 0001100 d.c. 8 bits nack p slave to master master to slave block read format s address slave address: address of the slave on the serial interface bus. s = start condition p = stop condition sr = repeated start condition d.c. = don? care ack = acknowledge, sda pulled low during rising edge of scl. nack = not acknowledge, sda left high during rising edge of scl. all data is clocked in/out of the device on rising edges of scl. = sda transitions from high to low during period of scl. = sda transitions from low to high during period of scl. command byte: fbh data byte: data is read from the locations set by the internal address pointer. ack command ack 7 bits address slave address: address of the slave on the serial interface bus. 7 bits 0 8 bits ack p 8 bits data byte n ack 8 bits ack data byte n 8 bits data byte nack 8 bits sr ack 1 byte count = n figure 5. communication formats max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 34 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ table 14. miscellaneous settings register address eeprom memory address bit range description [3:0] postboot timeout (all faults and outputs masked): 0h = no timeout 1h = 0.974ms 2h = 2.030ms 3h = 3.978ms 4h = 8.038ms 5h = 15.99ms 6h = 31.99ms 7h = 63.99ms 8h = 128ms 9h = 256.0ms ah = 512ms bh = 1024ms ch = 2048ms dh = 4096ms eh = 8192ms fh = 16384ms [6:4] temperature sensor lowpass filter cutoff: 000 = no filter 001 = 2.53hz 010 = 5.06hz 011 = 10.1hz 100 = 20.2hz 101 = 40.5hz 110 = 81hz 111 = 162hz 5bh dbh [7] not used. [1:0] overcurrent secondary threshold timeout: 00 = no delay 01 = 3.98ms 10 = 16ms 11 = 64ms [2] latch overc : 0 = no latch 1 = latched after assertion [4:3] not used. 5ch dch [5] threshold hysteresis (all thresholds): 0 = 0.78% 1 = 1.17% max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 35 table 14. miscellaneous settings (continued) register address eeprom memory address bit range description [6] consecutive faults on primary thresholds: 0 = fault occurs after primary threshold is exceeded one time (normal operation). 1 = fault occurs after primary threshold is exceeded twice. 5ch dch [7] fault log adc conversions option: 0 = when a fault log is triggered, only fault flags are saved in eeprom. 1 = when a fault log is triggered, fault flags and adc conversion results (8 msbs) are saved in eeprom. 5eh deh [7:0] firmware version. 8 bits of memory for user-defined firmware version number. [0] configuration lock: write a ??to r5fh[0] to toggle this register bit. 0 = register and eeprom configuration unlocked. 1 = register and eeprom configuration locked. [1] fault log eeprom lock flag (set automatically after fault log is triggered): write a ??to r5fh[1] to toggle this register bit. 0 = eeprom is not locked. a triggered fault log stores fault information to eeprom. 1 = a fault log has been triggered. write a ??to this bit to clear the flag and allow a new fault log to be triggered. 5fh dfh [7:2] not used. special commands the max16031/MAX16032 provide software reboot and fault log commands. a software reboot initiates the boot-up sequence, which normally occurs at por. during boot-up, eeprom configuration data is copied to registers. to initiate a software reboot, send 0xfc using the send byte format. a software-initiated fault log is functionally the same as a hardware-initiated fault log. during a fault log, adc registers and fault informa- tion are logged in eeprom. to trigger a software initi- ated fault log, send 0xfd using the send byte format. jtag serial interface the max16031/MAX16032 contain an ieee 1149.1- com- pliant jtag port in addition to the i 2 c/smbus-compatible serial bus. either interface may be used to access internal memory; however, only one interface is allowed to run at a time. all digital i/os on the max16031/MAX16032 are ieee 1149.1 boundary-scan compliant, and contain the typical jtag boundary scan cells that allow the inputs/outputs to be polled or forced high/low using stan- dard jtag instructions. the max16031/MAX16032 con- tain extra jtag instructions and registers not included in the jtag specification that provide access to internal memory. the extra instructions are: load address, write, read, reboot, save, and usercode. the extra registers are: memory address, memory write, memory read, and user-code data. see figure 6 for a block diagram of the jtag interface. test access port (tap) controller state machine the tap controller is a finite state machine that responds to the logic level at tms on the rising edge of tck. see figure 7 for a diagram of the finite state machine. test-logic-reset: at power-up, the tap controller is in the test-logic-reset state. the instruction register con- tains the idcode instruction. all system logic of the device operates normally. table 15. setting the i 2 c/smbus slave address a1 a0 bus address gnd gnd 0011000 gnd n.c. 0011001 gnd dbp 0011010 n.c. gnd 0101001 n.c. n.c. 0101010 n.c. dbp 0101011 dbp gnd 1001100 dbp n.c. 1001111 dbp dbp 1001110 max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 36 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ run-test/idle: the run-test/idle state is used between scan operations or during specific tests. the instruction register and test data registers remain idle. select-dr-scan: all test data registers retain their pre- vious state. with tms low, a rising edge of tck moves the controller into the capture-dr state and initiates a scan sequence. tms high during a rising edge on tck moves the controller to the select-ir-scan state. capture-dr: data are parallel-loaded into the test data registers selected by the current instruction. if the instruc- tion does not call for a parallel load or the selected test data register does not allow parallel loads, the test data register remains at its current value. on the rising edge of tck, the controller goes to the shift-dr state if tms is low or it goes to the exit1-dr state if tms is high. shift-dr: the test data register selected by the current instruction is connected between tdi and tdo and shifts data one stage toward its serial output on each rising edge of tck while tms is low. on the rising edge of tck, the controller goes to the exit1-dr state if tms is high. exit1-dr: while in this state, a rising edge on tck puts the controller in the update-dr state. a rising edge on tck with tms low puts the controller in the pause-dr state. pause-dr: shifting of the test data registers is halted while in this state. all test data registers retain their pre- vious state. the controller remains in this state while tms is low. a rising edge on tck with tms high puts the controller in the exit2-dr state. figure 6. jtag block diagram instruction register [length = 5 bits] registers and eeprom test access port (tap) controller memory write register [length = 8 bits] memory read register [length = 8 bits] memory address register [length = 8 bits] boundary scan register [length = 198 bits] user code register [length = 32 bits] identification register [length = 32 bits] tdi r pu tms tck v dbp mux 1 01101 01100 11111 bypass register [length = 1 bit] 00000 00100 00001 00010 01000 01001 01010 01100 01101 command decoder mux 2 tdo save reboot max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 37 exit2-dr: a rising edge on tck with tms high while in this state puts the controller in the update-dr state. a rising edge on tck with tms low enters the shift-dr state. update-dr: a falling edge on tck while in the update- dr state latches the data from the shift register path of the test data registers into a set of output latches. this prevents changes at the parallel output because of changes in the shift register. on the rising edge of tck, the controller goes to the run-test/idle state if tms is low or it goes to the select-dr-scan state if tms is high. select-ir-scan: all test data registers retain their previ- ous state. the instruction register remains unchanged during this state. with tms low, a rising edge on tck moves the controller into the capture-ir state. tms high during a rising edge on tck puts the controller back into the test-logic-reset state. capture-ir: use the capture-ir state to load the shift register in the instruction register with a fixed value. this value is loaded on the rising edge of tck. if tms is high on the rising edge of tck, the controller enters the exit1-ir state. if tms is low on the rising edge of tck, the controller enters the shift-ir state. shift-ir: in this state, the shift register in the instruction register is connected between tdi and tdo and shifts data one stage for every rising edge of tck toward the tdo serial output while tms is low. the parallel outputs of the instruction register as well as all test data regis- ters remain at their previous states. a rising edge on tck with tms high moves the controller to the exit1-ir state. a rising edge on tck with tms low keeps the controller in the shift-ir state while moving data one stage through the instruction shift register. figure 7. tap controller state diagram test-logic-reset 1 1 11 0 0 run-test/idle 0 0 0 0 1 1 1 0 0 1 0 1 1 0 1 0 1 select-dr-scan select-ir-scan capture-dr capture-ir shift-dr shift-ir exit1-dr exit1-ir pause-dr pause-ir exit2-dr exit2-ir update-dr update-ir 0 0 0 0 1 1 0 1 1 max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 38 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ exit1-ir: a rising edge on tck with tms low puts the controller in the pause-ir state. if tms is high on the ris- ing edge of tck, the controller enters the update-ir state. pause-ir: shifting of the instruction shift register is halt- ed temporarily. with tms high, a rising edge on tck puts the controller in the exit2-ir state. the controller remains in the pause-ir state if tms is low during a ris- ing edge on tck. exit2-ir: a rising edge on tck with tms high puts the controller in the update-ir state. the controller loops back to shift-ir if tms is low during a rising edge of tck in this state. update-ir: the instruction code that has been shifted into the instruction shift register is latched to the parallel outputs of the instruction register on the falling edge of tck as the controller enters this state. once latched, this instruction becomes the current instruction. a rising edge on tck with tms low puts the controller in the run-test/idle state. with tms high, the controller enters the select-dr-scan state. instruction register the instruction register contains a shift register as well as a latched parallel output and is 5 bits in length. when the tap controller enters the shift-ir state, the instruction shift register is connected between tdi and tdo. while in the shift-ir state, a rising edge on tck with tms low shifts the data one stage toward the serial output at tdo. a rising edge on tck in the exit1-ir state or the exit2-ir state with tms high moves the controller to the update-ir state. the falling edge of that same tck latch- es the data in the instruction shift register to the instruc- tion register parallel output. instructions supported by the max16031/MAX16032 and their respective operational binary codes are shown in table 16. sample/preload: this is a mandatory instruction for the ieee 1149.1 specification that supports two functions. the digital i/os of the device are sampled at the boundary scan test data register without interfering with the normal operation of the device by using the capture-dr state. sample/preload also allows the device to shift data into the boundary scan test data register through tdi using the shift-dr state. bypass: when the bypass instruction is latched into the instruction register, tdi connects to tdo through the 1-bit bypass test data register. this allows data to pass from dtdi to tdo without affecting the device? normal operation. extest: this instruction allows testing of all intercon- nections to the device. when the extest instruction is latched in the instruction register, the following actions occur. once enabled through the update-ir state, the parallel outputs of all digital outputs are driven. the boundary scan test data register is connected between tdi and tdo. the capture-dr samples all digital inputs into the boundary scan test data register. idcode: when the idcode instruction is latched into the parallel instruction register, the identification test data register is selected. the device identification code is loaded into the identification test data register on the rising edge of tck following entry into the capture-dr state. shift-dr is used to shift the identification code out serially through tdo. during test-logic-reset, the identification code is forced into the instruction register. the id code always has a 1 in the lsb position. the next 11 bits identify the manufacturer? jedec number and number of continuation bytes followed by 16 bits for the device and 4 bits for the version. see table 17. instruction binary code selected register/action bypass 11111 bypass idcode 00000 identification sample/preload 00001 boundary scan extest 00010 boundary scan usercode 00100 user-code data load address 01000 memory address read data 01001 memory read write data 01010 memory write reboot 01100 resets the device save 01101 stores current fault information in eeprom table 16. jtag instruction set max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 39 usercode: when the usercode instruction is latched into the parallel instruction register, the user- code data register is selected. the device user code is loaded into the user-code data register on the rising edge of tck following entry into the capture-dr state. shift-dr is used to shift the user code out serially through tdo. see table 18. load address: this is an extension to the standard ieee 1149.1 instruction set to support access to the memory in the max16031/MAX16032. when the load address instruction is latched into the instruction reg- ister, tdi connects to tdo through the 8-bit memory address test data register during the shift-dr state. read: this is an extension to the standard ieee 1149.1 instruction set to support access to the memory in the max16031/MAX16032. when the read instruc- tion is latched into the instruction register, tdi connects to tdo through the 8-bit memory read test data register during the shift-dr state. write: this is an extension to the standard ieee 1149.1 instruction set to support access to the memory in the max16031/MAX16032. when the write instruc- tion is latched into the instruction register, tdi connects to tdo through the 8-bit memory write test data regis- ter during the shift-dr state. reboot: this is an extension to the standard ieee 1149.1 instruction set to initiate a software-controlled reset to the max16031/MAX16032. when the reboot instruction is latched into the instruction register, the max16031/MAX16032 reset and immediately begin their boot-up sequence. save: this is an extension to the standard ieee 1149.1 instruction set that triggers a fault log. when the save instruction is latched into the instruction register, the max16031/MAX16032 copy fault information from reg- isters to eeprom. boundary scan the boundary scan feature allows access to all the dig- ital i/o connections of the max16031/MAX16032. if the sample/preload or the extest instruction is loaded into the instruction register, tdi connects to tdo through the 198-bit boundary scan register. each digital i/o pin corresponds to 1 bit (or 2 bits, in the case of the a0 and a1 pins) of the boundary scan register. the rest of the boundary scan bits are reserved and are loaded with zeros. when the sample/preload instruction is executed, the current state of the digital outputs is latched into the boundary scan register and is shifted out through tdo. this instruction may be executed without interrupting normal operation of the part. when the extest instruc- tion is executed, the boundary scan register bits super- sede the normal functionality of the i/o pins: an output mirrors the state of the corresponding boundary scan register bit. table 19 lists the function of each boundary scan regis- ter bit. since the i 2 c address select pins have three possible states, 2 boundary scan register bits are required to represent them. these bits are defined in table 20. applications information layout and bypassing bypass v cc , dbp, and abp each with a 1? capacitor to gnd. bypass rbp with a 2.2? capacitor to gnd. avoid routing digital return currents through a sensitive analog area, such as an analog supply input return path or abp? bypass capacitor ground connection. use dedicated analog and digital ground planes. msb d.c. (don? cares) i 2 c/smbus slave address user identification (firmware version) 00000000000000000 see table 15 r5eh[7:0] contents table 18. 32-bit user-code data msb lsb version (4 bits) device id (16 bits) manufacturer id (11 bits) fixed value (1 bit) 0000 0000000000000001 00011001011 1 table 17. 32-bit identification code max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory 40 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ a0a a0b a0 pin state 0 0 high impedance 0 1 low 1 0 high 1 1 not defined table 20. address pin state decode boundary cell no. description/pin 0?47 reserved 148 gpio1 (output) 149 gpio2 (output) 150 sda (output) 151 alert 152 fault2 153 fault1 154 overt 155 reset 156 overc 157?82 reserved 183 gpio2 (input) 184 gpio1 (input) 185 sda (input) 186 a0b 187 a0a 188 a1b 189 a1a 190 scl 191?97 reserved table 19. boundary cell order chip information process: bicmos max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 41 32, 44, 48l qfn .eps e l e l a1 a a2 e/ 2 e d/2 d detail a d2/2 d2 b l k e2/2 e2 (ne-1) x e (nd-1) x e e c l c l c l c l k package outline 21-0144 2 1 f 32, 44, 48, 56l thin qfn, 7x7x0.8m m package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) max16031/MAX16032 eeprom-based system monitors with nonvolatile fault memory maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 42 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2007 maxim integrated products is a registered trademark of maxim integrated products, inc. heaney package outline 21-0144 2 2 f 32, 44, 48, 56l thin qfn, 7x7x0.8m m package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) revision history pages changed at rev 1: 1, 41, 42 |
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